有人可能會問了，PHY的初始化在哪呢？其實，調用HAL\_ETH\_Init()函數的時候， HAL庫就已經對我們的PHY進行初始化了，當然，每個不一樣的PHY肯定是不一樣的配置，所以，這就需要我們自己對PHY參數進行配置，我們開發板使用的是LAN8720A芯片，LAN8720A 復位時需要一段延時時間，這里需要定義延時時間長度，大約 5~50ms即可，驅動代碼中需要獲取 PHY 的速度和工作模式， LAN8720A 的R31 是特殊控制/狀態寄存器，包括指示以太網速度和工作模式的狀態位，所以，我們需要在stm32f4xx\_hal\_conf.h中添加我們自己的PHY配置，具體見代碼清單 3?3。 ``` 1 /* ############ Ethernet peripheral configuration ################# */ 2 3 /* Section 1 : Ethernet peripheral configuration */ 4 5 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ 6 #define MAC_ADDR0 2U 7 #define MAC_ADDR1 0U 8 #define MAC_ADDR2 0U 9 #define MAC_ADDR3 0U 10 #define MAC_ADDR4 0U 11 #define MAC_ADDR5 0U 12 13 /* Definition of the Ethernet driver buffers size and count */ 14 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE 15 /* buffer size for receive */ 16 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE 17 /* buffer size for transmit */ 18 #define ETH_RXBUFNB ((uint32_t)8U) 19 /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ 20 #define ETH_TXBUFNB ((uint32_t)8U) 21 /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ 22 23 /* Section 2: PHY configuration section */ 24 25 /* LAN8720_PHY_ADDRESS Address*/ 26 #define LAN8720_PHY_ADDRESS 0U 27 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 28 #define PHY_RESET_DELAY ((uint32_t)0x00000005U) 29 /* PHY Configuration delay */ 30 #define PHY_CONFIG_DELAY ((uint32_t)0x00000005U) 31 32 #define PHY_READ_TO ((uint32_t)0x0000FFFFU) 33 #define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) 34 35 /* Section 3: Common PHY Registers */ 36 37 #define PHY_BCR ((uint16_t)0x00U) 38 /*!< Transceiver Basic Control Register */ 39 #define PHY_BSR ((uint16_t)0x01U) 40 /*!< Transceiver Basic Status Register */ 41 42 #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ 43 #define PHY_LOOPBACK ((uint16_t)0x4000U) 44 /*!< Select loop-back mode */ 45 #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) 46 /*!< Set the full-duplex mode at 100 Mb/s */ 47 #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) 48 /*!< Set the half-duplex mode at 100 Mb/s */ 49 #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) 50 /*!< Set the full-duplex mode at 10 Mb/s */ 51 #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) 52 /*!< Set the half-duplex mode at 10 Mb/s */ 53 #define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) 54 /*!< Enable auto-negotiation function */ 55 #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) 56 /*!< Restart auto-negotiation function */ 57 #define PHY_POWERDOWN ((uint16_t)0x0800U) 58 /*!< Select the power down mode */ 59 #define PHY_ISOLATE ((uint16_t)0x0400U) 60 /*!< Isolate PHY from MII */ 61 62 #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) 63 /*!< Auto-Negotiation process completed */ 64 #define PHY_LINKED_STATUS ((uint16_t)0x0004U) 65 /*!< Valid link established */ 66 #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) 67 /*!< Jabber condition detected*/ 68 69 /* Section 4: Extended PHY Registers */ 70 #define PHY_SR ((uint16_t)0x1FU) 71 /*!< PHY status register Offset*/ 72 73 #define PHY_SPEED_STATUS ((uint16_t)0x0004U) 74 /*!< PHY Speed mask */ 75 #define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) 76 /*!< PHY Duplex mask*/ ```